OSHADAPTIVE STATEPhysical Validation of an Autonomous Homeostatic Cognitive Architecture
17 pages · physical silicon, parity, endurance, oscilloscope, and analog loop.
Download paper ↗ OSH GLOBAL SYSTEMS, INC. APPLIED RESEARCH / 2026
A newcomputationalorganism.
OSH is a new autonomous computational architecture that gives a machine an internal condition that continues, a way to evaluate change and a path from selection to physical action. Its validated causal route runs locally on microcontroller silicon.
01 / UNDERSTANDA new architectureState · continuity · attention · action
02 / FOLLOWFrom PC to siliconA clear path through the evidence
03 / BUILDProducts around OSHLocal autonomy as a product capability
00 / WHAT IS OSH
THE ARCHITECTURE / EXPLAINED
A new architecture for autonomous computation.
OSH is a homeostatic semantic organism: a computational architecture with its own evolving internal state. A signal changes that state, attention evaluates possible paths, and selection connects the process to meaning or physical action. What happens in one cycle can shape the next.
01 / A STATE THAT CONTINUES
It carries its history into the next moment.
Most people see a machine react to an input. Inside OSH, the relevant starting point is its current endogenous condition. New signals alter a trajectory; the result is not treated as an isolated request.
02 / AN INTERNAL DECISION PATH
Attention and selection have a causal place.
The Homeostatic Attention Loop (HAL) evaluates candidates against that changing condition. A selector then chooses an edge in compact semantic structure. Language can express an outcome; it does not direct the tested route.
03 / ACTION IN THE PHYSICAL WORLD
The mechanism can close a real loop.
In the validated ESP32-S3 experiment, physical input perturbed OSH, the local route selected an action, and a real circuit returned feedback. The paper checks five internal causal levels against the PC reference.
OSH has its own computational authority.
It is a new architecture, not an LLM, a remote API or a prompt-driven agent. Its defining mechanism is persistent state, trajectory, homeostatic attention and selection, operating locally without cloud inference for the validated route.
OSH / FOLLOW THE LIVING LOOPINTERACTIVE MODEL
01 / SIGNAL
An event becomes a change in state.
A sensor reading, an internal need or another perturbation enters a mechanism that already has a condition and a history. Select each stage to see how the cycle develops.
FROM EXPLANATION TO EVIDENCESee the 150/150 PC–ESP32-S3 causal checks
01 / THE JOURNEYONE ARCHITECTURE · MULTIPLE FORMS OF PROOF
From a PC to physical silicon.
OSH began as a resident architecture on a computer. The next question was whether its mechanism could be carried beyond that machine and still preserve the behavior it was built to produce. Explore each step, then open the actual measurements below.
THE IDEA IN ONE LINE
Develop the causal path → carry its frozen core across targets → verify the original behavior on another ISA → test the route on real ESP32-S3 hardware.
CHAPTER 01 / THE HOSTOSH / EVIDENCE RECORD
RESIDENT RUNTIME6.466 ms
First, establish a working baseline.
Benchmark 3 measures OSH on a CPU-only Intel Atom D2500. It records 30 structured inputs and a resident runtime. This is a PC result, not a microcontroller timing claim.
Watch the PC recording and read Benchmark 3What crosses the boundary?
A frozen OSH computational substrate and its original validation harness. Virtual RISC-V execution and physical ESP32-S3 execution are separate tests. The ESP32-S3's main CPU is Xtensa; the RV32IMF result is a virtual cross-ISA test.
02 / BENCHMARK 3 FIRST ON A PC
INTEL ATOM D2500 · CPU ONLY · 12 SEP 2026B3 01 / PC STAGE
Benchmark 3.
OSH on a PC.
This is the first measured stage of the OSH journey. The recording shows José Fabián typing in the real OSH PC interface. The report measures its resident runtime on an Intel Atom D2500 under a controlled 30-input protocol.
REAL SCREEN / OSH ON PCDEMO.MP4 · 00:46
The recording shows the conversation and the OSH / STRUCTURAL TELEMETRY panel. It documents the interface in use; the reproducible measurements are in the report.
Open demo.mp4 ↗The player could not load the video. Watch the video from the repository ↗
PROTOCOL / 30 INPUTSGPU = 0
OSH MEDIAN6.466 ms
Structured resident runtime cycle.
TINYLLAMA 1.1B · ONE TOKEN18,186.463 ms
MEDIAN RUNTIME RATIO2,812.69×
WORKING SET / OSH → TINYLLAMA24.883 → 662.770 MB
SCOPE OF THE MEASUREMENT
The comparison measures runtime and Working Set under the stated protocol: TinyLlama was limited to one token per input. The computational tasks differ; the ratio does not measure intelligence, language quality, or equivalent task performance.
02 / PC · BENCHMARK 303 / EXPLORE THE PORTABILITY BRIDGE ↗
03 / PORTABILITY BRIDGE
PC → VERIFIED CORE → SILICON
PC → VERIFIED CORE → SILICON
A migration you can trace
The bridge from PC to silicon, tested step by step.
OSH began on a PC. In plain language, this benchmark asks whether its same core can be translated for many processors and still reproduce the expected behavior on a different instruction set. The frozen Tier-A code compiled across target profiles; its original validation harness then passed on a virtual RV32IMF. These steps established a portable core to carry into the physical ESP32-S3 validation documented below.
OSH / UNIVERSAL SUBSTRATE BENCHMARKVALIDATION / 23 SEP 2026
EVIDENCE 01 / CROSS-TARGET COMPILATION
One frozen core. Multiple target profiles.
The original SHA-256-verified Tier-A core and header generated objects for 21 of 22 profiles across x86, ARM, RISC-V, MIPS, PowerPC, SPARC, LoongArch64 and WASM32. The tested m68k profile failed; object generation alone does not prove physical execution on those targets.
COMPILE PASS21 / 22m68k / NOT PASSED
FROZEN ARTIFACTS / SHA-256 VERIFIEDCOMPILATION → VIRTUAL GOLDEN PARITY → PHYSICAL SILICON
What the benchmark establishes
The original Tier-A harness ran on an emulated RV32IMF and passed both golden cases, OSH_PRESENCE and OSH_NO_ACTIVATION. Maximum absolute error was ≤5×10⁻⁸ against the existing 10⁻⁶ threshold; the observed Top-K candidate order held. Physical ESP32-S3 results are documented separately in the technical paper below.
NEXT FRONTIER / PHYSICAL MIGRATION
Other target families now have a concrete path to investigation. Each future board still needs its own execution, causal-parity, timing, power and integration tests; compiling a profile is the first step, not the final proof.
04 / PHYSICAL MIGRATION
The OSH causal path reached real ESP32-S3 hardware.
After the PC baseline and portability checks, the physical paper verifies the architecture’s tested causal route on two real ESP32-S3 boards: state, trajectory, attention, selection and meaning, followed by action through an analog feedback circuit. Explore the measured results, their limits, and the new board-level power observation.
FROM HOST TO ESP32-S3
The tested architecture moved from PC to physical silicon.
The portability work tested the frozen computational core beyond the PC. The physical paper then documents native OSH execution on two ESP32-S3 units and 150/150 PC–MCU causal-parity checks across state, trajectory, HAL candidates, selected edge and meaning. The validated route also drove PWM, received analog feedback and completed 100,000 cycles.
PC · BASELINECORE · PORTABILITYESP32-S3 · PHYSICAL PROOF
The paper validates the tested architecture route on ESP32-S3 silicon. It does not claim that every interface, physical modality or other target board has been validated.
ESP32-S3 / FINAL EXPERIMENT
The system interacted with a real circuit.
B25K reference → ADC GPIO3 → OSH → PWM GPIO14 → external 1 kΩ / 100 µF network → ADC GPIO2. The policy exercised all three observable actions.
100,000PHYSICAL CYCLES
29.525 µsINTERNAL PATH MEAN
0 / 0ADC / STATE FAILURES
INC 5,160 · HOLD 93,358 · DEC 1,482. PHYSICAL_100K_GATE and FINAL_LATCH: PASS. An oscilloscope image preserves a representative 23.0 µs path pulse; this is a separate measurement method and does not replace the internal mean.
STEP19 / TWO PHYSICAL UNITS
Causality was compared, not just output.
Thirty cases were examined at each of five boundaries: C/P/X/T/H state, trajectory and vortex, HAL candidates, selected edge ID, and meaning.
150/150CAUSAL CHECKS
5INDEPENDENT LEVELS
2PHYSICAL ESP32-S3 UNITS
The tested path preserved intermediate identity. This does not establish general reasoning or speech quality.
Open technical paper ↗SCOPE / INTERPRETATION
The architecture’s tested route is on silicon.
The physical paper follows OSH from the PC reference through five-level causal parity and a closed analog feedback loop on ESP32-S3. The universal benchmark separately validates frozen Tier-A cross-target compilation and original-harness execution on an emulated RV32IMF.
150/150PC–MCU CAUSAL CHECKS
ESP32-S3PHYSICAL SILICON TESTED
21/22CROSS-TARGET OBJECT PROFILES
The paper does not document physical execution on other boards, a complete production stack migration, or live physical I2S and Wi-Fi/HTTP validation. Those require separate tests; no claim of general intelligence or consciousness is made.
Review portability evidence ↗BOARD-LEVEL INPUT POWER / PHYSICAL ESP32-S3
~0.134 W observed at the complete physical setup.
With USB power disconnected, the physical ESP32-S3 setup was powered directly from a UNI-T UTP3315TFL-II regulated bench supply. The display held at 4.97 V and 0.027 A for five minutes.
~0.134 WBOARD-LEVEL INPUT POWER
4.97 VSUPPLY VOLTAGE
27 mASTEADY CURRENT / 5 MIN
Measurement boundary: complete board-level physical setup. This is not isolated SoC power and not a logged high-bandwidth energy-per-decision measurement.
METHODDirect regulated bench supply; USB power disconnected.
OBSERVATION0.027 A remained stable for the full five-minute observation window.
CALCULATION4.97 V × 0.027 A = 0.13419 W → reported as approximately 0.134 W.
05 / ARCHITECTURE
Inside the causal path.
Select a stage to see its role and the evidence boundary that supports it. State persists; each input affects a trajectory rather than an isolated response.
STAGE 01 / INPUT
Perturbation
A signal from the environment or system perturbs persistent state. In the physical experiment, an analog reference enters through GPIO3 and feedback returns through GPIO2.
EVIDENCE: ADC → OSH → PWM/RC → ADC LOOP
The parity test compares five causal levels, including the identity of the selected edge. Internal equations, coefficients, and geometry remain protected.
06 / BUSINESSOSH GLOBAL SYSTEMS / PRODUCT OPPORTUNITY
THE INVESTMENT QUESTION
What would a manufacturer pay OSH to do?
To make a product respond to changing conditions with a resident internal state, local selection and a physical action path. OSH Global Systems can package that architecture for a specific device, prove it on the buyer's hardware, then participate in the value of every product shipped.
OSH / THE PROTECTED ASSETA native architecture that can become a product capability.
Its causal route has run on physical ESP32-S3. Its frozen core has generated objects for 21 of 22 target profiles, and the original harness passed on virtual RV32IMF. That progression makes new board integrations worth pursuing; each new target gets its own physical qualification.
Trace the evidence pathWHY NOT USE WHAT WE ALREADY HAVE?
Because these tools answer different questions.
TinyMLCan recognize learned patterns from data. A product may still need persistent regulation and a decision path after detection.
C++ / MicroPythonAre ways to write and run software. OSH supplies a specific resident architecture for state, trajectory, attention and selection.
Conventional controlPID and fixed control loops are valuable foundations. OSH can be evaluated as a supervisory layer where changing context requires an additional decision process.
Cloud AICan supply remote inference or language. The tested OSH route executes locally without a cloud inference call for each decision cycle.
WHERE THE BUYER SEES VALUE
One architecture. Different commercial openings.
Select a deployment to see the buyer, the concrete job and the proposed commercial relationship.
OSH / APPLICATION FIELDSELECT A MARKET ↘
01 / INDUSTRIAL EQUIPMENT
A machine facing changing conditions.
An equipment maker could evaluate OSH as a resident supervisory path that tracks internal condition and selects an action as sensor conditions evolve. A pilot would compare its decisions against the existing process and measure the effect on operations.
- Who pays
- Equipment OEM or plant operator
- Why pay
- A differentiated, locally acting product and a measurable operational outcome.
- Revenue path
- Paid pilot → board integration → per-unit license or supervised-node agreement.
THE BUYER’S RETURN
Make the gain visible in the customer’s own numbers.
A deal begins with one device and one measurable outcome. These are the value equations a pilot can fill with the buyer’s data.
01 / MORE VALUE PER DEVICE
Added margin per device × units shipped − total OSH royalties.
MEASURE / PRODUCT PRICING AND ADOPTION02 / FEWER EXPENSIVE INTERRUPTIONS
Verified interruptions avoided × the buyer’s cost per interruption.
MEASURE / RELIABILITY IN THE REAL PROCESS03 / LESS REMOTE DECISION COST
Eligible decisions handled locally × the current cost of that remote path.
MEASURE / FUNCTIONALLY COMPARABLE DECISIONSTHE COMMERCIAL MULTIPLIER
A design win can scale across a product line.
Licensing economics follow devices shipped, not the number of engineering hours it took to prove the first board. See how the same negotiated per-device amount changes with annual production volume.
10K100K1M10M
1,000,000 devices / year
EACH $1 / DEVICE IN A NEGOTIATED ROYALTY$1,000,000in illustrative annual gross licensing
The scale is mathematical, not a sales forecast. A real agreement defines the product, pricing, shipment volume and validation terms.
HOW OSH GLOBAL SYSTEMS EARNS
From engineering proof to recurring IP income.
- 01 / PilotPaid feasibility work on the buyer's board and use case.
- 02 / IntegrationHardware adaptation, instrumentation, acceptance tests and reference implementation.
- 03 / ProductionPer-device royalties or a negotiated platform license when the product ships.
- 04 / ExpansionFurther product lines, board families, support and partner programs.
Start with a device and an outcome worth measuring. Build the case for a repeatable product together.
Explore an OSH partnership07 / VISUAL RECORD
External instrumentation, in view.
Photographs preserved in the physical validation paper. Open each image for a closer look.
These captures document different measurements. They must not be added together or directly compared with the PC benchmark median.
08 / SOURCES
Full reports from the repository.
Benchmark 3 and the physical ESP32-S3 paper use repository files. The new Universal Substrate Benchmark is embedded here so this HTML also provides its full download and browser view.
Architectural Runtime Benchmark 3
17 pages · CPU-only protocol, latency, Working Set, repetition, and interpretation.
Download Benchmark 3 ↗Universal Substrate Benchmark
20 pages · 21/22 compiled target profiles, RV32IMF virtual golden parity, physical ESP32-S3 evidence and Appendix F.
Download benchmark ↗View report ↗09 / APPLICATIONS
Close to the physical world.
The experiment opens possibilities for local integration. Each application needs its own pilot, target hardware, and acceptance criteria.
Stateful machines
Explore local decisions alongside sensors and actuators, with continuity across cycles.
Private edge
Test resident paths in equipment where latency, autonomy, and local access matter.
Autonomous systems
Investigate regulation and selection close to physical signals and timing constraints.
MCUs and devices
Measure the substrate and full integration on a specific target before making product claims.
STATUS: PROPOSED APPLICATION AREAS · NOT VALIDATED END PRODUCTS
10 / CONTACT
Let’s discuss a concrete application.
Tell us which device, product line or market you want to open with OSH. We can define a target board, success criteria and the commercial path from pilot to integration.
OSH GLOBAL SYSTEMS, INC.
From a proven route to a product opportunity.
- 01Use case and target hardware.
- 02Latency, memory, power, and stability.
- 03Causal parity and integration limits.
- 04Technical and commercial decision.